AXIe stakes claim as PXI's "big brother"
The developers of the AXIe standard see it as an extension of the PXI test-development model.
By Richard A. Quinnell, Contributing Technical Editor -- Test & Measurement World, 2010-09-01 00:00:00 EDT
Early July marked the release of specifications for a new modular test instrument standard—AXIe (AdvancedTCA Extensions for Instrumentation and Test). The specifications add clock, triggering, and other signals to a high-performance architecture that initially targeted telecom computing. Rather than seeing the new standard as a competitor to PXI, however, AXIe's developers see it as an extension of the PXI test-development model.
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The ATCA specifications that AXIe leverages were developed to meet the high data rates and processing performance of the telecom industry. ATCA backplanes provide protocol-agnostic, multilane, switched-serial links among boards, and the backplanes support transfer speeds as great as 10 Gbps per lane. Blades that plug into the backplane are large (8U) and can draw as much as 200 W from system power—attributes that support the creation of complex, high-performance modules.
To make ATCA useful for test-system design, the AXIe specifications call for some subtle changes to the ATCA signal-line assignments. Eliminating two of ATCA's 16 blade slots, for instance, allows the AXIe 1.0 base specification to free backplane signal lines for use as timing, triggering, and local bus implementations. Twelve matched-length, MLVDS (multipoint low-voltage differential signaling) pairs provide a trigger bus that runs across all slots of the backplane. In addition, a signal set consisting of CLK100 (star clock), STRIG (star trigger), SYNC (star synchronization), and FCLK (fabric clock) signals runs from the system controller to each instrument slot to provide precision system timing (Figure 1).
 Figure 1. AXIe modifies the ATCA backplane. It sacrifices some module slots to free their data signal lines for creation of the timing and triggering signals essential for test applications. Courtesy of the AXIe Consortium. |
Another change AXIe makes to ATCA backplane signaling is the elimination of RTMs (rear transition modules) that would normally occupy what the ATCA specification calls "Zone 3" backplane connections and would be used for module-specific I/O. According to David Poole, the CTO at Aeroflex and director of the AXIe Consortium, AXIe modules use front-panel connections for their unique I/O, and they use Zone 3 for supplemental AXIe standard signals. One supplemental specification, AXIe 3.1, defines such signals as additional triggers, a calibration bus, an analog bus, and DUT (device under test) I/O lines for use in semiconductor test applications. Poole noted that the AXIe Consortium plans to release several such 3.N supplemental specifications for specific applications.
Complementary capabilities
Based on a modular industrial computing architecture supplemented with timing and triggering buses, the AXIe naturally invites comparisons with PXI. But the two are not competitive, according to AXIe Consortium members, and Aeroflex, in fact, also makes PXI modules. "AXIe doesn't displace PXI," said Poole, "it simply gives access to the higher-end performance that will be required in the future.""They are extremely complementary," added DesJardin, "with the main differences [being] the size of the boards, the amount of cooling and power available, and the bus capacity. AXIe is, in effect, a ‘big brother' to PXI that extends the PXI programming metaphor." He pointed to compatibilities between PXI and AXIe as evidence of this noncompetitive nature. "PCI Express is one of the signaling protocols used on the AXIe backplane and forms a fabric that is software-compatible with a PXIe system," he said. "An external system controller cannot tell the difference between an AXIe and a PXIe system, and the same drivers and development tools work for both systems."
Poole said that Ethernet is another of AXIe's supported backplane protocols, giving the system native compatibility with both PXI and LXI (Figure 2).
 Figure 2. The protocol-agnostic ATCA backplane allows AXIe systems to use PCI Express and Ethernet as backplane protocols, giving the systems native support for simple integration with both PXI and LXI systems. Courtesy of the AXIe Consortium. |
An additional indication of compatibility is the definition of an AXIe carrier that can hold two PXI or PXIe modules for insertion and use in an AXIe system. "The carrier is like a mini, two-slot PXI card cage," said DesJardin. "Using PXI cards is not an efficient way of building an entire AXIe system, but [it is] a good way of adding niche functionality if you are missing only one or two modules to complete your design."
Instead of replacing PXI, then, AXIe aims to take up where PXI approaches its limits. "AXIe is for instruments that are tough to do in PXI," said DesJardin, "where the power and space restrictions of PXI are a barrier."
Poole added that AXIe also extends the computing performance available for test. "If you look around the industry, you see bus bottlenecks becoming a problem. With AXIe, however, you can use up to 32 10-Gbit lanes to handle data. Another great attraction of AXIe is that it allows a full fabric for multiprocessing. In PXI, the only high-speed bus available for multiprocessing is PCIe, and even then there is only one root complex."
And multiprocessing is only one performance-multiplying attribute that AXIe brings to test. ATCA has built-in power and system management that makes it easy to expand a system to multiple cages. "So essentially, we have unlimited expansion potential," noted Poole. "Now there is nothing that cannot be done in a modular instrument," added DesJardin.
The vision that the AXIe Consortium holds for modular test, then, calls for AXIe and PXI to form a continuum that stretches from small, portable test instruments to large, powerful systems. While many of the physical structures are different, the two share some types of data links as well as the control and programming model.
For many test-system developers, the deciding factors of which to use may ultimately depend on the size and speed requirements of the final system. "If you can do it in PXI, go ahead," said DesJardin. "If not, you now have a pretty compatible architecture that can get the job done."